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| author | Danilo M. <danix@danix.xyz> | 2026-07-08 16:47:13 +0200 |
|---|---|---|
| committer | Danilo M. <danix@danix.xyz> | 2026-07-08 16:47:13 +0200 |
| commit | ccb2da5d7ab492de6458d0f652cb6384b3edb507 (patch) | |
| tree | 3514a1e06a355086d0a0cb651d853b7ada84302e /generate.py | |
| parent | 7346b22f1858e8b11aea3a2b0fe2066cf70192d9 (diff) | |
| download | imggen-ccb2da5d7ab492de6458d0f652cb6384b3edb507.tar.gz imggen-ccb2da5d7ab492de6458d0f652cb6384b3edb507.zip | |
Validate dimensions in the daemon /generate path
The one-shot CLI already rejects non-multiple-of-8 width/height up front, but
the daemon passed them straight through, so an odd dimension over HTTP produced
a downstream 500 or garbled output instead of a clear error. Add the same %8
check to /generate, returning 400 with a specific message. Also correct the
generate.py scope comment: the registry now holds SDXL-architecture fine-tunes,
not just SDXL base.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Diffstat (limited to 'generate.py')
| -rw-r--r-- | generate.py | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/generate.py b/generate.py index 95b2dd7..b6c0fb8 100644 --- a/generate.py +++ b/generate.py @@ -10,10 +10,11 @@ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. -# Local SDXL-base image generation for Intel Arc B580 (XPU backend). -# Bounded scope by design: SDXL base, single 1024x1024 image, no refiner, -# no Flux, no batching. This is what fits comfortably in 12GB VRAM once the -# fp32 VAE upcast is removed via the fp16-fix VAE. See README.md for limits. +# Local SDXL image generation for Intel Arc B580 (XPU backend). +# Bounded scope by design: SDXL-architecture models (see MODELS registry), +# single 1024x1024 image, no refiner, no Flux, no batching. This is what fits +# comfortably in 12GB VRAM once the fp32 VAE upcast is removed via the fp16-fix +# VAE. See README.md for limits. import argparse import sys |