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| author | Danilo M. <danix@danix.xyz> | 2026-07-06 18:34:31 +0200 |
|---|---|---|
| committer | Danilo M. <danix@danix.xyz> | 2026-07-06 18:34:31 +0200 |
| commit | fc78b51e29497703a65f125e844f7da558dbc577 (patch) | |
| tree | 5e5e3eb3c79b823971d4577d86684d154d127341 /docs/superpowers/plans | |
| download | imggen-fc78b51e29497703a65f125e844f7da558dbc577.tar.gz imggen-fc78b51e29497703a65f125e844f7da558dbc577.zip | |
Initial commit: local SDXL image generation on Intel Arc B580
Containerized SDXL-base generation targeting a 12GB Arc B580 under
Slackware. The container carries the Intel Level Zero runtime the host
distro does not package; the fp16-fix VAE removes the fp32 upcast that
would otherwise OOM at decode.
- imggen: host wrapper (GPU passthrough, /out bind-mount, model cache)
- generate.py: in-container XPU pipeline, scope-bounded to SDXL base
- Dockerfile: pinned to the known-good torch-XPU / diffusers stack
- README.md, CLAUDE.md: rationale, limits, and version-pinning notes
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Diffstat (limited to 'docs/superpowers/plans')
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