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33 hoursRefactor build_pipe to take a model key with fp16-variant fallbackDanilo M.1-9/+16
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
33 hoursAdd model registry and resolve_model with valid-key errorsDanilo M.2-1/+42
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
33 hoursAdd implementation plan for model menu + daemonDanilo M.1-0/+739
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
34 hoursAdd width/height flags and correct default host pathsDanilo M.2-5/+25
Pre-plan prep: -W/-H flags on generate.py with multiple-of-8 validation, generate() gains width/height params, copyright line normalized, and the wrapper defaults updated to the real host output/cache paths. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
36 hoursAdd design spec for model menu + persistent daemon + composeDanilo M.2-0/+238
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
3 daysInitial commit: local SDXL image generation on Intel Arc B580Danilo M.5-0/+368
Containerized SDXL-base generation targeting a 12GB Arc B580 under Slackware. The container carries the Intel Level Zero runtime the host distro does not package; the fp16-fix VAE removes the fp32 upcast that would otherwise OOM at decode. - imggen: host wrapper (GPU passthrough, /out bind-mount, model cache) - generate.py: in-container XPU pipeline, scope-bounded to SDXL base - Dockerfile: pinned to the known-good torch-XPU / diffusers stack - README.md, CLAUDE.md: rationale, limits, and version-pinning notes Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>