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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Pre-plan prep: -W/-H flags on generate.py with multiple-of-8 validation,
generate() gains width/height params, copyright line normalized, and the
wrapper defaults updated to the real host output/cache paths.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Containerized SDXL-base generation targeting a 12GB Arc B580 under
Slackware. The container carries the Intel Level Zero runtime the host
distro does not package; the fp16-fix VAE removes the fp32 upcast that
would otherwise OOM at decode.
- imggen: host wrapper (GPU passthrough, /out bind-mount, model cache)
- generate.py: in-container XPU pipeline, scope-bounded to SDXL base
- Dockerfile: pinned to the known-good torch-XPU / diffusers stack
- README.md, CLAUDE.md: rationale, limits, and version-pinning notes
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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